Integrated circuits (ICs) and other electronic devices often include arrangements of interconnected field effect transistors (FETs), also called metal-oxide-semiconductor field effect transistors (MOSFETs), or simply MOS transistors or devices. A typical MOS transistor includes a gate electrode as a control electrode and spaced apart source and drain electrodes, as well as a body electrode. A control voltage applied to the gate electrode controls the flow of current through a controllable conductive channel between the source and drain electrodes.
High voltage power and analog transistor devices are designed to be tolerant of the high currents and voltages that are present in power applications, such as motion control, air bag deployment, and automotive fuel injector drivers, and analog applications, such as current mirrors and amplifiers. One type of such power transistors is a laterally diffused metal-oxide-semiconductor (LDMOS) transistor. In an LDMOS device, a drift space is provided between the channel region and the drain region.
Power devices are susceptible to the generation of secondary charge carriers through impact ionization. LDMOS devices are often used in applications, such as automotive applications, involving operational voltages greater than 45 Volts. In an n-channel LDMOS transistor device, such high voltages may lead to areas with high electric fields, such as near the drain boundary. Accelerated by the high electric fields, electrons in the conduction band may be energized to an extent that electron-hole pairs are created from collisions with electrons in the valance band. The secondary charge carriers, i.e., holes in an n-channel device, are then attracted to a body terminal of the device, thereby contributing to the body current of the device. The high body current may lead to lower output impedance, which is undesirable for analog applications.
LDMOS transistor devices may be damaged as a result of the flow of secondary charge carriers across the device body. As the body current increases, the interior potential of the body also increases. If the interior potential is raised to an extent that the junction with the source is forward biased, a parasitic npn bipolar transistor formed via the source (emitter), body (base), and drain (collector) regions of the LDMOS transistor device is activated. Very large, damaging currents can result via the activation of the parasitic bipolar transistor, an operating condition referred to as “snapback.”
LDMOS devices are often characterized by a “safe operating area” in which the operating current and voltage levels are below levels that would result in a snapback event. Attempts to remain within the safe operating area to avoid device destruction or other damage are often undesirably limiting factors for device operation and application.